CorridorKey Engine

April 12, 2026 · View on GitHub


Commands

CommandDescription
corridorkey-engineLaunch the Textual TUI (default)
corridorkey-engine <path>Launch TUI with a project path pre-loaded
corridorkey-engine inference <path>Run keying inference on clips with Input + AlphaHint
corridorkey-engine generate-alphas <path> --model <engine>Generate alpha hints (birefnet, gvm, videomama)
corridorkey-engine wizard <path>Interactive setup wizard
corridorkey-engine serveStart engine process (stdio JSON-RPC)
corridorkey-engine serve --listen :9400Start engine daemon (TCP JSON-RPC)

Global Options

All options are global and must be placed before the subcommand.

Device & Pipeline

FlagDefaultDescription
--backendautoInference backend: auto, torch, torch_optimized, mlx
--devicesComma-separated GPU indices for multi-GPU, e.g. 0,1
--img-size2048Model input resolution (1024 for FullHD, 2048 for 4K)
--read-workers0Reader thread pool size (0 = auto)
--write-workers0Writer thread pool size (0 = auto)
--cpus0Total CPU budget for worker scaling (0 = auto)
--precisionfp16Floating-point precision: fp16, bf16, fp32
--dma-buffers6Pinned DMA buffer count (2–8). ~190 MB page-locked RAM each at 4K
--gpu-resilienceoffRequeue OOM frames to other GPUs instead of halting

Optimization

FlagDefaultDescription
--profileperformancePreset: original, optimized, performance, experimental
--flash-attentionprofileFlashAttention patching
--tiled-refinerprofileTiled CNN refiner
--cache-clearingprofileCUDA cache clearing between frames
--cudnn-benchmarkprofilecuDNN kernel auto-tune. Faster convolutions, +2–5 GB VRAM
--gpu-postprocessprofileGPU postprocessing. Faster, +~1.5 GB VRAM
--cpu-postprocessForce CPU postprocessing
--token-routingoffExperimental sparse attention. Improves speed at 4K+
--compile-modeprofilenone, default, reduce-overhead, max-autotune. Longer first-frame warmup
--tile-size512Tile size in pixels for the tiled refiner
--tile-overlap128Tile overlap in pixels

Individual flags override profile defaults.

Output

FlagDefaultDescription
--compexrComposite output format: exr, png, none
--checkerboardoffRender an opaque checkerboard comp instead of transparent RGBA
--exr-compressionzipEXR codec: zip, zips, piz, pxr24, dwaa, dwab, rle, none
--outputsfg,matte,comp,processedComma-separated output layers to write

Inference-Specific Options

These flags apply to the inference subcommand.

FlagDefaultDescription
--linear / --srgbpromptInput colorspace
--despill 0–10promptGreen spill suppression strength
--despeckle / --no-despecklepromptMorphological despeckle (tracking marker removal)
--despeckle-size400Minimum pixel area considered for despeckle
--refinerpromptRefiner strength multiplier

Omitted flags trigger interactive prompts.


serve Options

FlagDefaultDescription
--listen <addr>TCP address to listen on, e.g. :9400 or 0.0.0.0:9400. Omit to use stdio.
--log-level <level>INFOLogging verbosity (DEBUG, INFO, WARNING, ERROR)

Optimization Profiles

ProfilePrecisionVRAMWarmupDescription
originalfp32~9-10 GB~5sNo tiling, no cache clearing, full-resolution refiner
optimizedfp16~2-3 GB~10-15sFlashAttention + tiled refiner + cache clearing
performance (default)fp16~8-12 GB~5-10 minFull refiner, cuDNN benchmark, max-autotune — highest throughput
experimentalfp16~2-3 GB~2-5 minTiled refiner, torch.compile default mode, token routing

Warmup is the first-frame compilation time. The inductor cache (~/.cache/corridorkey/inductor/) stores compiled kernels, so subsequent runs with the same profile skip most of the warmup. Expect the full cost on the first run after a PyTorch or profile change.


Output Folder Structure

FolderFormatContents
Matte/EXRLinear alpha matte
FG/EXRStraight foreground (sRGB gamut)
Processed/EXRPremultiplied linear RGBA
Comp/EXR / PNGComposite preview (transparent RGBA or checkerboard)

Device Resolution Order

--backend flag  >  CORRIDORKEY_BACKEND env var  >  auto (MLX on Apple Silicon, torch_optimized on CUDA, torch elsewhere)
--devices flag  >  auto (all CUDA GPUs, or single best device)

Multi-GPU

corridorkey-engine inference /path/to/clips --devices 0,1

Each GPU loads its own independent model copy. Per-GPU VRAM usage is unchanged; throughput scales linearly with the number of GPUs.


MLX (Apple Silicon)

Install the MLX backend:

uv pip install corridorkey-mlx@git+https://github.com/nikopueringer/corridorkey-mlx.git

Place weights at CorridorKeyModule/checkpoints/corridorkey_mlx.safetensors.

MPS support is experimental. Set the following environment variable if you encounter errors from unsupported ops:

export PYTORCH_ENABLE_MPS_FALLBACK=1