Contributing to eSim

Thank you for your interest in contributing to eSim! 🎉 Every contribution — whether it's a bug fix, new feature, documentation improvement, or example circuit — helps make eSim better for everyone.

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📋 Table of Contents

• Our Contributors
• Getting Started
• Ways to Contribute
• Development Setup
• Pull Request Workflow
• Commit Guidelines
• Code Style
• Reporting Bugs
• Requesting Features
• Community

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🏆 Our Contributors

A huge thank you to all 149+ amazing people who have built eSim since 2015! 🎉

🏛️ Project Leads

Role	Name	Affiliation
Developed by	FOSSEE Team	IIT Bombay
Original Author	Fahim Khan	eSim / FOSSEE, IIT Bombay
Lead Maintainer	Sumanto Kar	FOSSEE, IIT Bombay
Core Maintainer	Rahul Paknikar	FOSSEE, IIT Bombay
Core Maintainer	Pranav P	FOSSEE, IIT Bombay

🥇 Core Maintainers

🥇 Sumanto Kar Lead Maintainer · 320 commits

🥈 Rahul Paknikar 265 commits

🥉 Fahim Khan 244 commits

All Contributors Mosaic

Auto-generated via contrib.rocks — View full list on GitHub →

🌟 Community Contributors

Contributors with 5–9 commits (click to expand)

Contributor	Commits	GitHub
Maanit	9
Myo Thinzar	9
Partha Pratim Nath	9
Sakhi Sharma	9
Temshinaro Jamir	9
Xoher	9
Abhishek Shakya	8
Aishwarya Sinha	8
Aman Shukla	8
Chandru	8
SAGARIKAA	8
Sakshi Pandey	8
Shaili Sahu	8
Anish R. Khapare	8
Deen Efil	8
Priyanka	8
Vivek Kumar	7
Bladen Martin	7
Jay Mistry	7
Vanshika Tanwar	7
Varadha	7
Suprraja	7
Taeolis	7
Arpit Sharma	6
Gaurav Supal	6
Jayanth	6
Manimaran K	6
Rachith H	6
Tanay Mathur	6
Maddy	6
Abhishek Soni	5
Barun	5
Varad Patil	5
Yash Kiran Ekhande	5
Krishna Goutam	5
Rohinthram	5

Contributors with 1–4 commits (click to expand)

Contributor	Commits	GitHub
Akshay Rukade	4
Vatsal Patel	4
Ankur Gupta	3
E Balakrishna	3
Gaurav Gupta	3
Harshit Singh Negi	3
Pranav Karuvally	3
Abinash Singh	2
Harvi	2
Kavya Manohar	2
Pyae Sone	2
S. Shiva Krishna Reddy	2
Sangavi GR	2
Manasi Yadav	2
Aditya Bhattacharya	1
Ashwith Rego	1
Boddu Ajay	1
Charaan	1
GiGi Koneti	1
Kusum Kisori	1

| Mudit Joshi | 1 | | | Naman Patel | 1 | | | Pavan Mantri | 1 | | | Pavithra W | 1 | | | Raksha Dave | 1 | | | Rudra Mani Upadhyay | 1 | | | Shravan A Y | 1 | | | Vikas Mulaje | 1 | | | Aamir Thekiya | 1 | | | Bhavya Bhardwaj | 1 | | | Mahak Gupta | 1 | | | Nuh Too Wai | 1 | |

🥉 Active Contributors (10–19 commits)

Ankush 19	Anup K. Pandey 19	G Jaswanth 19	E Kamalesh 18	Sai Charan 18	Mausam 17
Ajay Boddu 15	PSR 15	Komal Sheth 15	Dilip Boidya 15	Nishit Bayen 14	Suchinton 13
Karthick N. 13	Sabarish M. 12	Harshal 11	D Tharun 11	Jovin P John 11	Madhav K. 11
Ragul 11	Jawwaad 10	Nirmitha N 10	Pavan 10	Senbagaseelan 10	Tanisha 10
Ashok Kumar 10

🥈 Major Contributors (20+ commits)

#	Contributor	Commits	GitHub
1	Saurabh Bansode	49
2	Athul George	37
3	Nil Shah	36
4	Shanthi Priya	36
5	Anjali Jaiswal	35
6	Pranav P	34
7	Annesha Dey	33
8	Sunil Shetye	33
9	Hariom Thakur	28
10	Aditya Minocha	23
11	R. Krishnan	23
12	Ganderla Chaithanya	22
13	Anwesha	21

📈 Repository Growth & Activity

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🚀 Getting Started

1. Find an issue — Browse the issue tracker for bugs or features you'd like to work on
2. Claim it — Comment on the issue with "I would like to work on this" so maintainers can assign it to you
3. Fork & code — Follow the Pull Request Workflow below
4. Submit a PR — Every pull request must reference an issue

💡 First-time contributor? Look for issues labeled good first issue — these are beginner-friendly tasks curated by maintainers.

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🤝 Ways to Contribute

Type	Description	Difficulty
🐛 Bug Fixes	Fix reported issues from the issue tracker	⭐ – ⭐⭐
✨ New Features	Implement new functionality or enhance existing modules	⭐⭐ – ⭐⭐⭐
📝 Documentation	Improve docs, docstrings, README, or Sphinx docs in docs/	⭐
🧪 Testing	Add test cases or report bugs with reproducible steps	⭐ – ⭐⭐
🎨 UI/UX	Improve the PyQt6 user interface and user experience	⭐⭐
📚 Examples	Add new example circuits to the Examples/ directory	⭐
📦 Packaging	Help with Flatpak, Snap, AppImage, or Docker builds	⭐⭐⭐
🌐 Integration	Improve KiCad, Ngspice, GHDL, or Makerchip integration	⭐⭐⭐

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🔧 Development Setup

Prerequisites

Tool	Version	Purpose
Python	3.6+	Core application runtime
PyQt6	≥ 6.5.0	GUI framework
KiCad	Latest	Schematic & PCB editor
Ngspice	35+	Circuit simulation engine
Git	Latest	Version control

Setup Steps

# 1. Fork the repository on GitHub, then clone your fork
git clone https://github.com/<your-username>/eSim.git
cd eSim

# 2. Install Python dependencies
pip install -r requirements.txt

# 3. (Optional) Install additional tools for full functionality
# See INSTALL file for KiCad, Ngspice, and GHDL setup

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📬 Pull Request Workflow

flowchart LR
    A["🍴 Fork"] --> B["🌿 Branch"]
    B --> C["💻 Code"]
    C --> D["✅ Commit"]
    D --> E["⬆️ Push"]
    E --> F["📬 PR"]

    style A fill:#6c5ce7,color:#fff
    style B fill:#00b894,color:#fff
    style C fill:#0984e3,color:#fff
    style D fill:#fdcb6e,color:#333
    style E fill:#e17055,color:#fff
    style F fill:#d63031,color:#fff

Step-by-Step

1. Fork & Clone

# Fork via GitHub UI, then:
git clone https://github.com/<your-username>/eSim.git
cd eSim

2. Create a Feature Branch

# Always branch from master — never commit directly to master
git checkout -b fix/issue-42-rectifier-bug

Branch naming convention:

• fix/issue-<number>-short-description — for bug fixes
• feature/issue-<number>-short-description — for new features
• docs/short-description — for documentation changes

3. Make Your Changes

• Write clean, well-commented code
• Follow the Code Style guidelines
• Test your changes locally

4. Commit Your Changes

git add <path-to-changed-files>
git commit -m "Fixes issue #42 - Fix half-wave rectifier simulation error"

⚠️ One commit per pull request. If you have multiple commits, squash them before submitting.

5. Push & Open a PR

git push origin fix/issue-42-rectifier-bug

Then open a Pull Request on GitHub targeting the master branch.

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📝 Commit Guidelines

Commit Message Format

Fixes issue #<issue_number> - <one-line summary of what you did>

<optional detailed description>
- What was the problem?
- What did you change?
- Why this approach?

Examples

Fixes issue #42 - Fix AC analysis crash when frequency range is empty

The AC analysis module threw an unhandled exception when the user
left the frequency range fields blank. Added input validation in
Analysis.py to show an error dialog instead of crashing.

Fixes issue #87 - Add 4-bit counter example circuit

Added a new example project under Examples/4_bit_counter with
schematic, netlist, and simulation configuration files.

Rules

Rule	Details
Reference an issue	Every PR must link to an existing GitHub issue
One commit per PR	Squash multiple commits before submitting
Clear subject line	Format: Fixes issue #N - Brief description
Add a body	Explain what you changed and why

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🎨 Code Style

eSim follows PEP 8 — the Python community's style guide.

Rule	Details
Style	PEP 8 compliant
Indentation	4 spaces (no tabs)
Line length	Max 79 characters
Docstrings	Required for all public functions and classes
Imports	Group by stdlib → third-party → local; one per line
Naming	snake_case for functions/variables, PascalCase for classes

Linting

# Check your code before submitting
flake8 src/

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🐛 Reporting Bugs

Found a bug? Please open an issue with:

1. Title — Clear, concise summary of the problem
2. Environment — OS, Python version, eSim version
3. Steps to reproduce — Exact steps to trigger the bug
4. Expected behavior — What should happen
5. Actual behavior — What actually happens
6. Screenshots/Logs — If applicable, attach console output or screenshots

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💡 Requesting Features

Have an idea for a new feature? Open an issue with:

1. Title — Prefix with [Feature Request]
2. Problem — What problem does this solve?
3. Proposed solution — How should it work?
4. Alternatives considered — Any other approaches you thought of?
5. Additional context — Mockups, references, or related issues

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💬 Community

Channel	Link
📧 Email	contact-esim@fossee.in
💬 Forum	forums.fossee.in
🌐 Website	esim.fossee.in
📚 Dev Docs	esim.readthedocs.io

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Thank you for contributing to eSim! ❤️
_{Every contribution, no matter how small, makes a difference.}