Bitcells

November 12, 2022 ยท View on GitHub

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Bitcells

This page of the documentation explains the bitcells supported by OpenRAM.

Table of Contents

  1. Multiport Bitcells
  2. Relative Bitcell Sizes
  3. Thin SRAM Bitcells

Multiport Bitcells

  • Based on 6T SRAM cell
    • Standard read-write
    • Isolated read-only ports
    • Write-only port (not sized for reads)
  • Can accommodate foundry bitcells

Multiport Bitcells

Relative Bitcell Sizes (0.35um SCMOS)

Standard 6T (1rw) 6.8um x 9.2umIsolated Read 10T (1rw, 1r) 10.9um x 13.9umDFF 21.9um x 21.2um (from OSU standard cell library)

Thin SRAM Bitcells (130nm)

Single Port 1.2um x 1.58umDual Port 2.40um x 1.58umSingle Port (w/ straps & taps) 2.49um x 1.58umDual Port (w/ straps & taps) 3.12um x 1.97um
DFF (for reference) 5.83um x 7.07 um