X-HEEP

X-HEEP (eXtensible Heterogeneous Energy-Efficient Platform) is an open-source, configurable, and extensible RISC-V microcontroller described in SystemVerilog.

Originally designed at the ESL lab of EPFL, the project has grown into a collaborative effort, currently maintained by the ESL, the CEI at UPM, and POLITO's VLSI lab.

Built on the foundations of the PULP-Platform project from ETHZ and UniBO, and the OpenTitan project, X-HEEP blends energy efficiency with an extensible architecture designed for the future of heterogeneous computing.

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Features

• Configurable RISC-V CPUs: Supports CV32E2, CV32E40P, CV32E40PX (with CV-X-IF), and CV32E40X cores
• Extensible architecture: Add custom accelerators via the CV-X-IF interface or as memory-mapped peripherals on the system bus
• Comprehensive software stack: Baremetal and FreeRTOS support with HAL drivers, SDK, and CMake-based build system
• Multi-tool simulation: Verilator, QuestaSim, VCS, and Xcelium
• FPGA support: Pynq-Z2, ZCU104, ZCU102, Nexys-A7-100t, Genesys2, AUP-ZU3
• ASIC proven: Multiple tape-outs in TSMC 65nm, GF 22nm, and TSMC 16nm
• Docker support: Ready-to-use Docker image with all dependencies

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Quick Start

# 1. Clone the repository
git clone https://github.com/x-heep/x-heep.git
cd x-heep

# 2. Pull the Docker image (recommended) or set up manually
make -C util/docker docker-pull
make -C util/docker docker-run

# 3. Inside the container, generate the MCU and run hello world
make mcu-gen
make app
make verilator-run

See the Setup Guide for manual installation instructions.

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Documentation

Full documentation is available on Read the Docs.

Section	Description
Getting Started	Setup, generating the MCU, compiling and running software
How to...	Simulation, debugging, compiling apps, FPGA, flash programming, and more
Configuration	CPU, memory, bus, pads, peripherals, and linker configuration
Peripherals	SPI, I2C, DMA, Timer, Serial Link
FPGA	Running on FPGA boards, bitstream generation, debugging with ILA
ASIC	ASIC implementations (HEEPocrates, HEEPnosis, X-TRELA, and more)
Extending	Adding custom hardware accelerators and software
Testing	CI workflows, VerifHeep verification library

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Repository Structure

x-heep/
├── configs/          # MCU configuration files (HJSON and Python)
├── docs/             # Sphinx documentation source
├── hw/               # Hardware (RTL, IPs, FPGA wrappers)
│   ├── ip/           # X-HEEP core IPs
│   ├── ip_examples/  # Example IPs for reference
│   ├── vendor/       # Vendored third-party IPs
│   ├── fpga/         # FPGA board wrappers and constraints
│   └── asic/         # ASIC implementation files
├── sw/               # Software (applications, drivers, HAL, SDK)
│   ├── applications/ # Example applications
│   ├── device/       # HAL, SDK, drivers, linker scripts
│   ├── build/        # Build output
│   └── freertos/     # FreeRTOS integration
├── tb/               # Testbench files
├── test/             # Test and verification scripts
├── util/             # Utilities (vendor tool, Docker, etc.)
├── scripts/          # Build and simulation scripts
├── Makefile          # Top-level Makefile
└── core-v-mini-mcu.core  # FuseSoC core description

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Block Diagram

X-HEEP's architecture is divided into power domains: CPU subsystem, memory banks, peripheral subsystem, and always-on peripheral subsystem. Each domain can be independently clock-gated or power-gated for energy efficiency.

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Community

• Documentation: x-heep.readthedocs.io
• Matrix Chat: #x-heep:matrix.org
• GitHub Issues: Report bugs and request features
• Contributions: Pull requests are welcome! See our Testing guide for CI information.

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Reference

If you use X-HEEP in your academic work, please cite:

@INPROCEEDINGS{machetti2025xheep,
  author={Machetti, Simone and Schiavone, Pasquale Davide and Ansaloni, Giovanni and Peón-Quirós, Miguel and Atienza, David},
  booktitle={2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)},
  title={X-HEEP: An Open-Source, Configurable and Extendible RISC-V Platform for TinyAI Applications},
  year={2025},
  doi={10.1109/ISVLSI65124.2025.11130281}
}

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License

X-HEEP is licensed under Apache 2.0 with SHL-2.1, unless otherwise noted in specific subdirectories.