LogicIR: Logic Gate Networks for Image Restoration

This repository provides the official implementation of "LogicIR: Logic Gate Networks for Image Restoration".

Our implementation builds upon difflogic. On top of it, we implement the convolutional differentiable logic gate network architecture described in Convolutional Differentiable Logic Gate Networks.

🛠️ Conda Environment Setup

For the tested environment (PyTorch 2.9.1 + CUDA 12.2), run:

conda create -n logicir python=3.10
conda activate logicir
pip install -r requirements.txt
pip install -e . --no-build-isolation

This code has also been tested with PyTorch 1.13.0 + CUDA 11.7. For this environment, install the CUDA 11.7-specific requirements instead:

conda create -n logicir python=3.10
conda activate logicir
pip install -r requirements_cu117.txt
pip install -e . --no-build-isolation

For additional installation support for difflogic, please refer to INSTALLATION_SUPPORT.md.

⚡ Quick Start

You can quickly test LogicIR using the sample images included in this repository.

First, set up the environment and download the model weights from Google Drive. Then place the checkpoints in the expected folder.

Required checkpoint structure:

final_trained_model/
├── logicir_s_denoising_std25.pth
├── logicir_s_r4_denoising_std25.pth
├── logicir_l_denoising_std25.pth
└── logicir_s_r4_denoising_std25_tiny.pth

Then run:

bash scripts/test.sh

The restored images, noisy inputs, and ground-truth images will be saved to:

results/

For training or full evaluation, please prepare the datasets and checkpoints as described below.

📦 Datasets

We use the BSD dataset for training. The processed training images can be downloaded from the DnCNN-PyTorch repository.

Training images are expected to be placed under:

data/train/

Validation or test images are expected to be placed under:

data/

data/
├── train/
│   ├── test_001.png
│   ├── test_002.png
│   └── ...
└── Set12/
    ├── 01.png
    ├── 02.png
    └── ...

During training, the preprocessing step generates HDF5 files used by the dataloader:

data/train.h5
data/val.h5

✅ Test

Model weights are available from Google Drive. Please download them and place them in the appropriate folder.

For testing, place the checkpoints as follows:

final_trained_model/
├── logicir_s_denoising_std25.pth
├── logicir_s_r4_denoising_std25.pth
├── logicir_l_denoising_std25.pth
└── logicir_s_r4_denoising_std25_tiny.pth

Then run:

bash scripts/test.sh

# LogicIR-S
CUDA_VISIBLE_DEVICES=0 python ./experiments/test.py \
  --noiseL 25 \
  --val_noiseL 25 \
  --batchSize 1 \
  --channels 2048 \
  --test_data Set12 \
  --rotation \
  --test_file final_trained_model/logicir_s_denoising_std25.pth

If you want to evaluate your own checkpoint, replace --test_file with the path to your trained .pth file.

🚀 Train

Start Training

To train LogicIR-S for Gaussian denoising with noise level 25, run:

bash scripts/train.sh

Checkpoints and training logs will be saved to:

logs/logicir_s_denoising_std25/

CUDA_VISIBLE_DEVICES=0 python ./experiments/train.py \
  --noiseL 25 \
  --val_noiseL 25 \
  --batchSize 4 \
  --channels 2048 \
  --milestone 35000 \
  --log_every 200 \
  --lr 1e-2 \
  --preprocess True \
  --outf logs/logicir_s_denoising_std25

Fine-tuning

After the initial training stage, LogicIR is further fine-tuned using the straight-through estimator (STE).

To fine-tune LogicIR-S, run:

bash scripts/finetune.sh

CUDA_VISIBLE_DEVICES=0 python ./experiments/finetune.py \
  --noiseL 25 \
  --val_noiseL 25 \
  --batchSize 3 \
  --channels 2048 \
  --log_every 100 \
  --lr 1e-3 \
  --implementation 'cuda_ste' \
  --outf logs/finetune_logicir_s_denoising_std25

Rotation Training (Optional)

After fine-tuning, you can run the rotation-based training stage to obtain rotation-enhanced models such as the -2RT and -4RT variants.

To run rotation training, use:

bash scripts/rotation.sh

For an RTX 4090, the batch size is set to 1 in the provided script.

CUDA_VISIBLE_DEVICES=0 python ./experiments/rotation.py \
  --noiseL 25 \
  --val_noiseL 25 \
  --batchSize 1 \
  --channels 2048 \
  --log_every 50 \
  --lr 1e-3 \
  --outf logs/rotation_logicir_s_denoising_std25_final

🔋 FPGA Deployment

We provide a compact --tiny True option, referred to as LogicIR-S-Tiny, for resource-constrained settings. This lightweight variant replaces the full multi-scale LogicIR-S architecture with a sequential logic-gate network and uses a narrower internal feature width, reducing hardware resource usage while preserving restoration capability.

LogicIR-S-Tiny is particularly suitable for small FPGA devices, where area, memory, and latency are constrained and a favorable performance-efficiency trade-off is important. We thank the EcoLogic project, which provides a useful reference for FPGA implementation.

📌 Citation

If this code is useful for your research, please cite our paper.

@inproceedings{lee2026logicir,
  title={LogicIR: Logic Gate Networks for Image Restoration},
  author={Lee, Hongjae and Son, Myungjun and Yu, Jaeseong and Jung, Seung-Won},
  booktitle={European Conference on Computer Vision},
  year={2026}
}

📬 Contact

Email: jimmy9704@korea.ac.kr