FVP Base platform overview

February 14, 2026 · View on GitHub

Boot sequence

FVP Base emulator is typically launched using both a secure flashloader and a normal flashloader. The configuration looks like this:

-C bp.secureflashloader.fname=path/to/arm-trusted-firmware/build/fvp/debug/bl1.bin \
-C bp.flashloader0.fname=path/to/fip.bin

We use Arm Trusted Firmware (ATF) as the secure monitor running at S-EL3. It initializes the system, sets up the secure world, and pass control to the non-secure world.

The boot sequence works in the following way:

  • BL1 (Secure ROM Bootloader) - Initializes trusted components and loads the next stage (BL2).

  • BL2 (Trusted Boot Firmware) - Verifies and loads the next stages: BL31 and BL33.

  • BL31 (EL3 Runtime Firmware) - Provides runtime services at EL3, including PSCI (Power State Coordination Interface) and context switching between secure and non-secure worlds.

  • BL32 (Secure Payload) - optional secure-world component that runs at S-EL1. It is used to provide Trusted Execution Environment (TEE). If not required, this stage can be skipped, and BL31 will directly pass control to BL33. In our case we do not use BL32.

  • BL33 (Non-secure Payload) - The final stage of the boot chain, typically the entry point to the non-secure kernel or bootloader. We use little kernel as BL33.

Memory Usage (bytes) [RAM]

ComponentStartLimitSizeFreeTotal
BL10x40340000x40400000x70000x50000xc000
BL20x40200000x40340000x100000x40000x14000
BL2U0x40200000x40340000xa0000xa0000x14000
BL310x40030000x40400000x220000x1b0000x3d000

Memory Usage (bytes) [ROM]

ComponentStartLimitSizeFreeTotal
BL10x00000000x40000000x8bd00x3ff74300x4000000

To check the memory layout, refer to TF-A Memory Layout Tool Documentation

Little kernel and DTB location

On the FVP platform, DTB start address and the BL33 entry point are both configured in the platform’s source files:

  • DTB base address: 0x82000000 (32MB size)
  • BL33 entry address: 0x88000000

You can find these settings in the platform_def.h header file:

DTS for FVP Base you can find at fdts

Peripheral Address Map

The peripheral address map for the FVP Base platform can be found in the following documentation: Base Platform memory map

Currently, little kernel supports:

  • UART0,PL011
  • GICv2

Interrupt Assignment

The interrupt assignment for the FVP Base platform can be found in the following documentation: Base Platform interrupt assignments