FERRIT Digital Archival Platform
August 4, 2026 ยท View on GitHub
FERRIT is a century-scale digital archival platform based on Ferroelectric RAM.
This repo contains PCB layouts, schematics, firmware and documentation.
Find more information on the FERRIT project page.
Hardware
FERRIT is a modular upgradable system with 3 component types:
- A controller
- A backplane
- Removable ferroelectric memory cards
The controller communicates with the memory cards over a SPI/QSPI bus and exposes the memory to an interface, such as a USB mass storage device.
Specifications
- Max capacity: 256MB+
- Max addressable memory devices per memory card: 16
- Max addressable memory devices per system: 256
- Interface: Depends on controller
- Speed: Depend on controller
Note: The max capacity assumes double-sided memory cards with 1MB ICs. Higher capacities may be possible in the future.
Components
| Board | Type | Notes |
|---|---|---|
| FERRIT-CY | Controller | RP2040 / USB-FS |
| FERRIT-M8 | Memory card | 8 x SOP-16 |
| FERRIT-1 | Backplane + Controller | RP2040 / USB-FS / 1 memory card slot |
| FERRIT-8 | Backplane | 8 memory card slots (1U rack-mount) |
| FERRIT-16 | Backplane | 16 memory card slots |
Firmware
The firmware can be updated by holding down the BOOT button while plugging in the USB cable, and then dragging and dropping a new UF2 file to the device.
You can build the firmware from source, if you have pico-sdk installed:
$ cd firmware/ferrit
$ mkdir build
$ cd build
$ cmake .. -DPICO_DEFAULT_BOOT_STAGE2_FILE=$PICO_SDK_PATH/src/rp2040/boot_stage2/boot2_generic_03h.S
$ make
Pinouts
Connector
The FERRIT controller and memory cards use the same form-factor and share certain signals:
| Pin | Controller | Memory Card |
|---|---|---|
| 1 | QSPI_SCLK | QSPI_SCLK |
| 3 | GND | GND |
| 5 | QSPI_SD0 | QSPI_SD0 |
| 7 | GND | GND |
| 9 | QSPI_SD1 | QSPI_SD1 |
| 11 | GND | GND |
| 13 | QSPI_SD2 | QSPI_SD2 |
| 15 | GND | GND |
| 17 | QSPI_SD3 | QSPI_SD3 |
| 19 | GND | GND |
| 2 | QSPI_SS | QSPI_SS |
| 4 | SS0 | GND |
| 6 | CS0 | CS0 |
| 8 | CS1 | CS1 |
| 10 | CS2 | CS2 |
| 12 | CS3 | CS3 |
| 14 | SS1 | GND |
| 16 | SS2 | GND |
| 18 | SS3 | GND |
| 20 | PWR3V3 | PWR3V3 |
The slot select (SSx) signals determine which slot is selected, while the chip select (CSx) signals select an IC on that slot.
License
The contents of this repo are released under the Lone Dynamics Open License.