Pipelined division

March 7, 2022 · View on GitHub

Run with make verilator

Performs a pipelined division over 16 bits, with a 16 cycles latency.

Output:

[cycle   2] 20043 /     1 = ...
[cycle   3] 20043 /     2 = ...
[cycle   4] 20043 /     3 = ...
[cycle   5] 20043 /     4 = ...
[cycle   6] 20043 /     5 = ...
[cycle   7] 20043 /     6 = ...
[cycle   8] 20043 /     7 = ...
[cycle   9] 20043 /     8 = ...
[cycle  10] 20043 /     9 = ...
[cycle  11] 20043 /    10 = ...
[cycle  12] 20043 /    11 = ...
[cycle  13] 20043 /    12 = ...
[cycle  14] 20043 /    13 = ...
[cycle  15] 20043 /    14 = ...
[cycle  16] 20043 /    15 = ...
[cycle  17] 20043 /    16 = ...
[cycle  18]                 ... =20043
[cycle  19]                 ... =10021
[cycle  20]                 ... = 6681
[cycle  21]                 ... = 5010
[cycle  22]                 ... = 4008
[cycle  23]                 ... = 3340
[cycle  24]                 ... = 2863
[cycle  25]                 ... = 2505
[cycle  26]                 ... = 2227
[cycle  27]                 ... = 2004
[cycle  28]                 ... = 1822
[cycle  29]                 ... = 1670
[cycle  30]                 ... = 1541
[cycle  31]                 ... = 1431
[cycle  32]                 ... = 1336
[cycle  33]                 ... = 1252