VTL
June 1, 2026 · View on GitHub
Maintainer planning: https://github.com/orgs/vlang/projects/8 (Vlang ML Roadmap — VSL + VTL; may require project access)
Detailed roadmap: ROADMAP.md
GPU memory: DEVICE_MEMORY.md
Done (2026-06-01)
| Issue | Topic |
|---|---|
| #87 | Serialization + CIFAR checkpoints |
| #88 | vs NumPy/PyTorch benchmarks + PR comments |
| #89–#91 | CUDA Linear/Conv2D + DeviceSession (Phase 1) |
| #101/#104 | GPU activation chain (Phase 2) |
| #105 | Linear CUDA backward (VTL_CUDA_BACKWARD=1, Phase 3) |
| #107 | Conv2D CUDA backward (cuDNN, same eligibility as forward) |
| #111/#114 | Adam on GPU + persistent DeviceSession slots (#106) |
| #110 | Vulkan f32 Linear in Sequential forward (VTL_USE_VULKAN=1, -d vulkan) |
| #116 | f32 autograd: Sequential + MSE forward/backprop compile |
| — | f32 tiny training: nn_cifar10_f32_tiny_synth + f32_training_smoke_test |
| — | CUDA training smoke: nn_cifar10_cuda + nn/cuda_training_smoke_test |
| — | f32 Vulkan training: nn_cifar10_vulkan + f32_vulkan_training_smoke_d_vulkan_test |
| — | Vulkan Conv2D f32 forward/backward (same-padding, im2col+GEMM) |
| — | Vulkan ReLU/Sigmoid f32 (relu_vulkan_f32 / sigmoid_vulkan_f32) |
| — | Vulkan Adam f32 fused shader (VTL_USE_VULKAN=1, VSL adam_step) |
| — | Conv2D autograd: register weight/bias parents (conv2d_autograd_smoke_test) |
| #86 | DataLoader |
| — | from_array clones shape (fixes #41 aliasing) |
VSL (downstream): #280–#285, #304 conv2d backward GEMM, #305 Adam shaders.
Beta gate (open)
| Priority | Issue | Topic |
|---|---|---|
| P1 | #41 | Windows example crash — shape clone landed; needs Windows CI confirmation |
Post-beta tracking
| Priority | Issue | Topic |
|---|---|---|
| P2 | #63 | ARM GPU support |
| P2 | — | Vulkan: persistent GPU activation chain between layers (CUDA has VTL_GPU_ACTIVATIONS) |
The beta contract is tensors, autograd, high-level layers/losses/optimizers,
datasets, and f32 CPU training. CUDA and Vulkan remain opt-in experimental
backend paths during beta. Generic f64 training is tracked as post-beta until
the autograd Gate[T] interface compiles without mixed Payload[f32] and
Payload[f64] specialization.
Local development
Lightweight workflow: DEV_LIGHTWEIGHT.md
v up
cd ~/.vmodules
v test vtl/nn vtl/datasets
v run vtl/examples/nn_cifar10_tiny_synth/main.v
v run vtl/examples/nn_cifar10_f32_tiny_synth/main.v
# Vulkan f32 full stack (use -prod for GPU)
# VTL_USE_VULKAN=1 v -prod -d vulkan run vtl/examples/nn_cifar10_vulkan/main.v
# VTL_USE_VULKAN=1 VTL_TEST_VULKAN=1 VJOBS=1 v -prod -d vulkan test vtl/nn/f32_vulkan_training_smoke_d_vulkan_test.v
CI
- Default PR:
bin/test(scoped modules +nn_cifar10_tiny_synth) - f32 beta smoke:
nn_cifar10_f32_tiny_synthand f32 autograd/training tests full-mllabel:ci-full-ml.ymlrunsbin/test --full- CUDA / Vulkan: local or future labeled workflows
Project board sync
From repo root (requires gh scopes read:project, project):
./.github/scripts/sync-ml-project-8.sh